Encapsulated capacitors have been manufactured in many configurations. Finished capacitors have been mounted on various substrates in various manners. In the early days of electronics these components were relatively large and were put in place and electrically connected to a circuit board by hand. The polarity of polar capacitors was easily marked on and easily read from the relatively large surfaces of the components.
In recent years as a result of trends towards miniaturization and automation many types of capacitors have become much smaller. They also have become more adapted for automated manufacturing and automated assembly onto substrates or into the equipment using them.
The reduction in surface area of the capacitors has decreased the area where printed markings could be made, such as those used to indicate polarity. This created the need for another method of indicating polarity. Further, automated equipment does not generally respond to printed markings and requires a polarity indicator adapted to its capabilities.
Various forms of asymetrical packaging have previously been suggested to indicate polarity. These include chamfers and unequally sized terminals. These previous forms have not all been adaptable to high speed manufacturing methods, nor met many of the other requirments imposed by capacitor users.
The miniaturization of components and new automated equipment has permitted the dense packing of components on a substrate. The high density of components has increased the likelihood of intercomponent shorting due to the closeness of exposed component leads. Further, the dense packing of substrates within many devices has also created the possibility of a conductive portion of a component on one substrate being electrically connected to a component on another substrate. The reduction of the potential for unwanted component interconnection has therefore become an important factor in the design of chip capacitors.
Simply designing a chip capacitor which meets solely the requirements of the capacitor user is alone insufficient for a useable chip capacitor. Densely packed substrates having many chip capacitors, and devices having large numbers of substrates require a method of producing the chip capacitors in large numbers at a high efficiency. Previously known chip capacitors were not adaptable to high efficiency production means required to produce these large numbers of chip capacitors at an acceptable cost per unit with acceptable electrical and physical characteristics.
An efficient manufacturing method has many requirements of its own. The small size of the various elements of the capacitor makes them very sensitive to physical damage during manufacture and subsequent handling. An efficient manufacturing method will not damage any of the elements and produces a finished capacitor not exhibiting the high leakage currents and other poor electrical characteristics produced by physical damage of the capacitor elements and connections. Further, an acceptable method will have a minimum number of steps reducing costs, time and equipment requirements.